The present invention generally relates to a Complementary Metal Oxide Semiconductor (CMOS) process technology, and more particularly to a bipolar device with improved performance and built by standard CMOS processes.
While CMOS devices have advantages of low power consumption and high tolerance to noise, they often need some specially designed I/O devices and circuits to protect them from high voltage signals. Those I/O devices and circuits usually require extra masks in the course of semiconductor processing. One way to simplify such semiconductor processing is to use bipolar devices, such as bipolar transistors, as the I/O devices. The bipolar devices are able to sustain higher voltage, and easy to manufacture while fully compatible with conventional CMOS process technologies. In addition, bipolar devices have many advantages than CMOS in building analog circuitry. It would be desirable to use bipolar devices together with CMOS devices in certain circuits to achieve a better performance with no additional cost.
FIGS. 1 and 2 illustrate a conventional PNP bipolar transistor 10 compatible with CMOS process technologies. The LOCal Oxidation of Silicon (LOCOS) isolations 11 define three active areas 12, 13 and 14 on N well 15 in a semiconductor substrate. The active areas 12 and 13 doped with P-type impurities form an emitter 16 and collector 17, respectively. The LOCOS isolation 11 between the emitter 16 and collector 17 defines an intrinsic base 18 thereunder in the N well 15. An extrinsic base 19 is electrically connected to the intrinsic base 18 via the body of the N well 15. The extrinsic based 19 is doped with N type of impurities to improve its conductivity. When the emitter 16, collector 17 and extrinsic base 19 are properly biased, carriers would flow between the emitter 16 and the collector 17 to result in amplifications.
The performance of the PNP bipolar transistor 10 greatly depends on the electrical characteristics of the width in intrinsic base 18 and the spacing to the extrinsic base 19. Conventionally, its current gain β, about 4-10, is too small to make a practical use of the bipolar transistor 10. Furthermore, if a Shallow Trench Isolations (STI) instead of a LOCOS isolation is used, it is almost impossible for carriers to travel between the collector and emitter over the STI. This further degrades the bipolar transistor's performance.
What is needed is a bipolar device compatible with CMOS technology that has improved performance. If the width of a base is defined by a poly gate, rather than spaced by STI or LOCOS, the current gain can be very high in today's very deep submicron technologies. Moreover, if the collector and the extrinsic base are not isolated by shallow trench, the current can flow through from the extrinsic base to collector without any blockage.